CY25200
Programmable Spread Spectrum Clock Generator for EMI Reduction
Features
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Benefits
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Wide operating output (SSCLK) frequency range 3–200 MHz Programmable spread spectrum with nominal 31.5 kHz modulation frequency Center spread: ±0.25% to ±2.5% Down spread: –0.5% to –5.0% Input frequency range External crystal: 8–30 MHz fundamental crystals External reference: 8–166 MHz clock Integrated phase-locked loop (PLL) Programmable crystal load capacitor tuning array Low cycle-to-cycle jitter 3.3V operation with 2.5V output clock drive option Spread spectrum On and Off function Power down or Output Enable function Output frequency select option Field-programmable Package: 16 pin TSSOP
Suitable for most PC peripherals, networking, and consumer applications. Provides wide range of spread percentages for maximum EMI reduction to meet regulatory agency Electro Magnetic Compliance (EMC) requirements. Reduces development and manufacturing costs and time to market. Eliminates the need for expensive and difficult to use higher order crystals. Internal PLL generates up to 200 MHz outputs; also generates custom frequencies from an external crystal or a driven source. Enables fine tuning of output clock frequency by adjusting CLoad of the crystal. Eliminates the need for external CLoad capacitors. Application compatibility in standard and low power systems. Provides ability to enable or disable spread spectrum with an external pin. Enables low power state or output clocks to High-Z state. Enables quick generation of sample prototype quantities.
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Logic Block Diagram
7
Divider Bank 1 Output Select Matrix VCO SSCLK1
8 SSCLK2 9
SSCLK3
XIN/CLKIN 1 XOUT 16 CXOUT
OSC.
Q
Φ
12 SSCLK4
CXIN
P
PLL
Divider Bank 2
14 SSCLK5/REFOUT/CP2 15 SSCLK6/REFOUT/CP3
2
VDD
3
AVDD
5

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