FET ( Field Effect Transistor) Unipolar device i. e. operation depends on only one type of charge carriers (h or e) Voltage controlled Device (gate voltage controls drain current)Very high input impedance (?109-1012 ?)Source and drain are interchangeable in most Low-frequency applicationsLow Voltage Low Current Operation is possible (Low-power consumption)Less Noisy as Compared to BJTNo minority carrier storage (Turn off is faster) Self limiting deviceVery small in size, occupies very small space in ICsLow voltage low current operation is possible in MOSFETS Zero temperature drift of out put is possiblek Few important advantages of FET over conventional Transistors Types of Field Effect Transistors (The Classification) JFETMOSFET (IGFET) n-Channel JFETp-Channel JFET n-Channel EMOSFET p-Channel EMOSFET Enhancement MOSFET Depletion MOSFET n-Channel DMOSFET p-Channel DMOSFET FET Figure: n-Channel JFET. The Junction Field Effect Transistor (JFET) Gate Drain Source SYMBOLS n-channel JFET Gate Drain Source n-channel JFETOffset-gate symbol Gate Drain Source p-channel JFET Figure: n-Channel JFET and Biasing Circuit. Biasing the JFET Figure: The nonconductive depletion region becomes broader with increased reverse bias. (Note: The two gate regions of each FET are connected to each other.) Operation of JFET at Various Gate Bias Potentials P P + - DC Voltage Source + - + - N N Operation of a JFET Gate Drain Source Figure: Circuit for drain characteristics of the n-channel JFET and its Drain characteristics. Non-saturation (Ohmic) Region: The drain current is given by Where, IDSS is the short circuit drain current, VP is the pinch off voltage Output or Drain (VD-ID) Characteristics of n-JFET Saturation (or Pinchoff) Region: Figure: n-Channel FET for vGS = 0. Simple Operation and Break down of n-Channel JFET Figure: If vDG exceeds the breakdown voltage VB, drain current increases rapidly. Break Down Region N-Channel JFET Characteristics and Breakdown Figure: Typical drain characteristics of an n-channel JFET. VD-ID Characteristics of EMOS FET Saturation or Pinch off Reg. Locus of pts where Figure: Transfer (or Mutual) Characteristics of n-Channel JFET IDSS VGS (off)=VP Transfer (Mutual) Characteristics of n-Channel JFET JFET Transfer CurveThis graph shows the value of ID for a given value of VGS Biasing Circuits used for JFET Fixed bias circuitSelf bias circuitPotential Divider bias circuit JFET (n-channel) Biasing Circuits For Self Bias Circuit For Fixed Bias Circuit Applying KVL to gate circuit we get and Where, Vp=VGS-off & IDSS is Short ckt. IDS JFET Biasing Circuits Count… or Fixed Bias Ckt. JFET Self (or Source) Bias Circuit This quadratic equation can be solved for VGS & IDS The Potential (Voltage) Divider Bias A Simple CS Amplifier and Variation in IDS with Vgs FET Mid-frequency Analysis: A common source (CS) amplifier is shown to the right. The mid-frequency circuit is drawn as follows: the coupling capacitors (Ci and Co) and the bypass capacitor (CSS) are short circuits short the DC supply voltage (superposition) replace the FET with the hybrid-p modelThe resulting mid-frequency circuit is shown below. FET Mid-frequency Analysis: A common source (CS) amplifier is shown to the right. The mid-frequency circuit is drawn as follows: the coupling capacitors (Ci and Co) and the bypass capacitor (CSS) are short circuits short the DC supply voltage (superposition) replace the FET with the hybrid-p modelThe resulting mid-frequency circuit is shown below. Procedure: Analysis of an FET amplifier at mid-frequency: 1)Find the DC Q-point. This will insure that the FET is operating in the saturation region and these values are needed for the next step.2)Find gm. If gm is not specified, calculate it using the DC values of VGS as follows:3)Calculate the required values (typically Avi, Avs, AI, AP, Zi, and Zo. Use the formulas for the appropriate amplifier configuration (CS, CG, CD, etc). PE-Electrical Review Course - Class 4 (Transistors) Example 7: Find the mid-frequency values for Avi, Avs, AI, AP, Zi, and Zo for the amplifier shown below. Assume that Ci, Co, and CSS are large.Note that this is the same biasing circuit used in Ex. 2, so VGS = -0.178 V.The JFET has the following specifications: IDSS = 4 mA, VP = -1.46 V, rd = 50 k FET Amplifier Configurations and Relationships: Note: The biasing circuit is the same for each amp. R s C i v i + v s + _ _ i i G V DD V DD R 1 R SS R 2 Common Drain (CD) Amplifier (also called "source follower") R L C o v o + _ i o D S Figure: Circuit symbol for an enhancement-mode n-channel MOSFET. Figure: n-Channel Enhancement MOSFET showing channel length L and channel width W. Figure: For vGS < Vto the pn junction between drain and body is reverse biased and iD=0. Figure: For vGS >Vto a channel of n-type material is induced in the region under the gate. As vGS increases, the channel becomes thicker. For small values of vDS ,iD is proportional to vDS.The device behaves as a resistor whose value depends on vGS. Figure: As vDS increases, the channel pinches down at the drain end and iD increases more slowly. Finally for vDS> vGS -Vto, iD becomes constant. Current-Voltage Relationship of n-EMOSFET Locus of points where Figure: Drain characteristics Figure: This circuit can be used to plot drain characteristics. Figure: Diodes protect the oxide layer from destruction by static electric charge. Figure: Simple NMOS amplifier circuit and Characteristics with load line. Figure: Drain characteristics and load line Figure vDS versus time for the circuit of Figure 5.13. Figure Fixed- plus self-bias circuit. Figure Graphical solution of Equations (5.17) and (5.18). Figure Fixed- plus self-biased circuit of Example 5.3. Figure The more nearly horizontal bias line results in less change in the Q-point. Figure Small-signal equivalent circuit for FETs. Figure FET small-signal equivalent circuit that accounts for the dependence of iD on vDS. Figure Determination of gm and rd. See Example 5.5. Figure Common-source amplifier. For drawing an a c equivalent circuit of Amp.Assume all Capacitors C1, C2, Cs as short circuit elements for ac signalShort circuit the d c supplyReplace the FET by its small signal model Analysis of CS Amplifier A C Equivalent Circuit Simplified A C Equivalent Circuit Analysis of CS Amplifier with Potential Divider Bias This is a CS amplifier configuration therefore the input is on the gate and the output is on the drain. Figure vo(t) and vin(t) versus time for the common-source amplifier of Figure 5.28. Figure Common-source amplifier. An Amplifier Circuit using MOSFET(CS Amp.) Figure Small-signal equivalent circuit for the common-source amplifier. A small signal equivalent circuit of CS Amp. Figure vo(t) and vin(t) versus time for the common-source amplifier of Figure 5.28. Figure Gain magnitude versus frequency for the common-source amplifier of Figure 5.28. Figure Source follower. Figure Small-signal ac equivalent circuit for the source follower. Figure Equivalent circuit used to find the output resistance of the source follower. Figure Common-gate amplifier. Figure See Exercise 5.12. Figure Drain current versus drain-to-source voltage for zero gate-to-source voltage. Figure n-Channel depletion MOSFET. Figure Characteristic curves for an NMOS transistor. Figure Drain current versus vGS in the saturation region for n-channel devices. Figure p-Channel FET circuit symbols. These are the same as the circuit symbols for n-channel devices, except for the directions of the arrowheads. Figure Drain current versus vGS for several types of FETs. iD is referenced into the drain terminal for n-channel devices and out of the drain for p-channel devices.
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FET ( Field Effect Transistor) Unipolar device i. e. operation depends on only one type of charge carriers (h or e) Voltage controlled Device (gate voltage controls drain current)Very high input impedance (?109-1012 ?)Source and drain are interchangeable in most Low-frequency applicationsLow Voltage Low Current Operation is possible (Low-power consumption)Less Noisy as Compared to BJTNo minority carrier storage (Turn off is faster) Self limiting deviceVery small in size, occupies very small space in ICsLow voltage low current operation is possible in MOSFETS Zero temperature drift of out put is possiblek Few important advantages of FET over conventional Transistors Types of Field Effect Transistors (The Classification) JFETMOSFET (IGFET) n-Channel JFETp-Channel JFET n-Channel EMOSFET p-Channel EMOSFET Enhancement MOSFET Depletion MOSFET n-Channel DMOSFET p-Channel DMOSFET FET Figure: n-Channel JFET. The Junction Field Effect Transistor (JFET) Gate Drain Source SYMBOLS n-channel JFET Gate Drain Source n-channel JFETOffset-gate symbol Gate Drain Source p-channel JFET Figure: n-Channel JFET and Biasing Circuit. Biasing the JFET Figure: The nonconductive depletion region becomes broader with increased reverse bias. (Note: The two gate regions of each FET are connected to each other.) Operation of JFET at Various Gate Bias Potentials P P + - DC Voltage Source + - + - N N Operation of a JFET Gate Drain Source Figure: Circuit for drain characteristics of the n-channel JFET and its Drain characteristics. Non-saturation (Ohmic) Region: The drain current is given by Where, IDSS is the short circuit drain current, VP is the pinch off voltage Output or Drain (VD-ID) Characteristics of n-JFET Saturation (or Pinchoff) Region: Figure: n-Channel FET for vGS = 0. Simple Operation and Break down of n-Channel JFET Figure: If vDG exceeds the breakdown voltage VB, drain current increases rapidly. Break Down Region N-Channel JFET Characteristics and Breakdown Figure: Typical drain characteristics of an n-channel JFET. VD-ID Characteristics of EMOS FET Saturation or Pinch off Reg. Locus of pts where Figure: Transfer (or Mutual) Characteristics of n-Channel JFET IDSS VGS (off)=VP Transfer (Mutual) Characteristics of n-Channel JFET JFET Transfer CurveThis graph shows the value of ID for a given value of VGS Biasing Circuits used for JFET Fixed bias circuitSelf bias circuitPotential Divider bias circuit JFET (n-channel) Biasing Circuits For Self Bias Circuit For Fixed Bias Circuit Applying KVL to gate circuit we get and Where, Vp=VGS-off & IDSS is Short ckt. IDS JFET Biasing Circuits Count… or Fixed Bias Ckt. JFET Self (or Source) Bias Circuit This quadratic equation can be solved for VGS & IDS The Potential (Voltage) Divider Bias A Simple CS Amplifier and Variation in IDS with Vgs FET Mid-frequency Analysis: A common source (CS) amplifier is shown to the right. The mid-frequency circuit is drawn as follows: the coupling capacitors (Ci and Co) and the bypass capacitor (CSS) are short circuits short the DC supply voltage (superposition) replace the FET with the hybrid-p modelThe resulting mid-frequency circuit is shown below. FET Mid-frequency Analysis: A common source (CS) amplifier is shown to the right. The mid-frequency circuit is drawn as follows: the coupling capacitors (Ci and Co) and the bypass capacitor (CSS) are short circuits short the DC supply voltage (superposition) replace the FET with the hybrid-p modelThe resulting mid-frequency circuit is shown below. Procedure: Analysis of an FET amplifier at mid-frequency: 1)Find the DC Q-point. This will insure that the FET is operating in the saturation region and these values are needed for the next step.2)Find gm. If gm is not specified, calculate it using the DC values of VGS as follows:3)Calculate the required values (typically Avi, Avs, AI, AP, Zi, and Zo. Use the formulas for the appropriate amplifier configuration (CS, CG, CD, etc). PE-Electrical Review Course - Class 4 (Transistors) Example 7: Find the mid-frequency values for Avi, Avs, AI, AP, Zi, and Zo for the amplifier shown below. Assume that Ci, Co, and CSS are large.Note that this is the same biasing circuit used in Ex. 2, so VGS = -0.178 V.The JFET has the following specifications: IDSS = 4 mA, VP = -1.46 V, rd = 50 k FET Amplifier Configurations and Relationships: Note: The biasing circuit is the same for each amp. R s C i v i + v s + _ _ i i G V DD V DD R 1 R SS R 2 Common Drain (CD) Amplifier (also called "source follower") R L C o v o + _ i o D S Figure: Circuit symbol for an enhancement-mode n-channel MOSFET. Figure: n-Channel Enhancement MOSFET showing channel length L and channel width W. Figure: For vGS < Vto the pn junction between drain and body is reverse biased and iD=0. Figure: For vGS >Vto a channel of n-type material is induced in the region under the gate. As vGS increases, the channel becomes thicker. For small values of vDS ,iD is proportional to vDS.The device behaves as a resistor whose value depends on vGS. Figure: As vDS increases, the channel pinches down at the drain end and iD increases more slowly. Finally for vDS> vGS -Vto, iD becomes constant. Current-Voltage Relationship of n-EMOSFET Locus of points where Figure: Drain characteristics Figure: This circuit can be used to plot drain characteristics. Figure: Diodes protect the oxide layer from destruction by static electric charge. Figure: Simple NMOS amplifier circuit and Characteristics with load line. Figure: Drain characteristics and load line Figure vDS versus time for the circuit of Figure 5.13. Figure Fixed- plus self-bias circuit. Figure Graphical solution of Equations (5.17) and (5.18). Figure Fixed- plus self-biased circuit of Example 5.3. Figure The more nearly horizontal bias line results in less change in the Q-point. Figure Small-signal equivalent circuit for FETs. Figure FET small-signal equivalent circuit that accounts for the dependence of iD on vDS. Figure Determination of gm and rd. See Example 5.5. Figure Common-source amplifier. For drawing an a c equivalent circuit of Amp.Assume all Capacitors C1, C2, Cs as short circuit elements for ac signalShort circuit the d c supplyReplace the FET by its small signal model Analysis of CS Amplifier A C Equivalent Circuit Simplified A C Equivalent Circuit Analysis of CS Amplifier with Potential Divider Bias This is a CS amplifier configuration therefore the input is on the gate and the output is on the drain. Figure vo(t) and vin(t) versus time for the common-source amplifier of Figure 5.28. Figure Common-source amplifier. An Amplifier Circuit using MOSFET(CS Amp.) Figure Small-signal equivalent circuit for the common-source amplifier. A small signal equivalent circuit of CS Amp. Figure vo(t) and vin(t) versus time for the common-source amplifier of Figure 5.28. Figure Gain magnitude versus frequency for the common-source amplifier of Figure 5.28. Figure Source follower. Figure Small-signal ac equivalent circuit for the source follower. Figure Equivalent circuit used to find the output resistance of the source follower. Figure Common-gate amplifier. Figure See Exercise 5.12. Figure Drain current versus drain-to-source voltage for zero gate-to-source voltage. Figure n-Channel depletion MOSFET. Figure Characteristic curves for an NMOS transistor. Figure Drain current versus vGS in the saturation region for n-channel devices. Figure p-Channel FET circuit symbols. These are the same as the circuit symbols for n-channel devices, except for the directions of the arrowheads. Figure Drain current versus vGS for several types of FETs. iD is referenced into the drain terminal for n-channel devices and out of the drain for p-channel devices.