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文档格式:pdf 更新日期:2011-10-30C8051F020 C Programming文档预览: 6 C8051F020 C Programming 6.0 Introduction 6.1 Register Definitions, Initialization and Startup Code Basic C program Structure 6.2 Programming Memory Models Overriding the default memory model, Bit-valued data, Special Function Registers ... 点击下载
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文档格式:pdf 更新日期:2011-09-14c8051f020-C8051F120文档预览: (2-cycle) C8051F120 100 MIPS, 128 kB Flash, 12-Bit ADC, 100-Pin Mixed-Signal MCU Analog Peripherals 12-Bit ADC - ±1 LSB INL; no missing codes ... 点击下载
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文档格式:pdf 更新日期:2011-10-30Silicon Labs C8051F020, C8051F021, C8051F022, C8051F023 Data Sheet文档预览: C8051F020/1/2/3 Rev. 1.4 3 TABLE OF CONTENTS 1. SYSTEM OVERVIEW 17 1.1. CIP-51 Microcontroller Core 22 1.1.1. 点击下载
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文档格式:ppt 更新日期:2011-10-30The Silicon Laboratories C8051F020文档预览: Prof. Cherrice Traver ECE/CS-352: Embedded Microcontroller Systems Internal Osc Configuration OSCICN Missing clock detector enable Internal Osc. frequency ready system clock select 0 = internal 1 = external (internal by default) Internal ... 点击下载
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文档格式:pdf 更新日期:2011-10-14C8051F020文档预览: C8051F020 C8051F020 C8051F020 C8051F020 Mixed-Signal 64KB ISP FLASH MCU PRELIMINARY P0, P1, P2, P3 Latches JTAG Logic TCK TMS ... 点击下载
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文档格式:pdf 更新日期:2011-10-3022. TIMERS文档预览: C8051F020/1/2/3 Rev. 1.4 225 22. TIMERS The C8051F020/1/2/3 devices contain 5 counter/timers: three are 16-bit counter/timers compatible with those found in the standard 8051, and two are 16-bit auto-reload timers for use with the ADCs ... 点击下载
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文档格式:pdf 更新日期:2011-10-30CYF020 Single Board Computer, Sub-credit Card Size (68x48mm) with Silicon Laboratories C8051F020 microcontroller.文档预览: "DILOGIC" e-mail: dilogic@zg.htnet.hr Zagrebacka 64 www.dilogic.hr 10410 Velika Gorica phone: +385-1-6256-168 Croatia fax: +385-1-6256-169 CYF020 DATA SHEET CYF020 Single Board Computer, Sub-credit Card Size (68x48mm) with Silicon ... 点击下载
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文档格式:pdf 更新日期:2011-07-05UNI-C8051F020文档预览: Rev. 0.1 11/08 Copyright C 2008 by Silicon Laboratories UNI-C8051020 UNI-C8051F020 C8051F020 UNI PROTOTYPE BOARD USER'S GUIDE 1. ... 点击下载
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文档格式:ppt 更新日期:2011-10-30Other C8051F020 Subsystems文档预览: Prof. Cherrice Traver EE/CS-152: Microprocessors and Microcontrollers Serial Transmission of Data parallel serial sender sender receiver receiver Useful for long distance transmission – less wires – but slower Faster transmission – more ... 点击下载
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文档格式:pdf 更新日期:2011-10-30Figure 7.1. ADC1 Functional Block Diagram文档预览: C8051F020/1/2/3 Rev. 1.4 75 7. ADC1 (8-BIT ADC) The ADC1 subsystem for the C8051F020/1/2/3 consists of an 8-channel, configurable analog multiplexer (AMUX1), a programmable gain amplifier (PGA1), and a 500 ksps, 8-bit successive ... 点击下载
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