文档预览： Pin Name Pin Type (1st, 2nd, & 3rd Function) Pin Description VCCIO[1..4] Power These are I/O supply voltage pins for banks 1 through 4. Each bank can support a different voltage level. VCCIO supplies power to the output buffers for all I/O ... 点击下载

文档预览： ®Altera Corporation 1 Cyclone FPGA Family April 2003, ver. 1.2 Data Sheet DS-CYCLONE-1.2 Introduction Preliminary Information The Cyclone TM field programmable gate array family is based on a 1.5-V, 0.13-µm, all-layer copper SRAM ... 点击下载

文档预览： Feature EP1C3 EP1C4 EP1C6 EP1C12 EP1C20 LEs 2,910 4,000 5,980 12,060 20,060 M4K RAM Blocks (128 x 36 bits) 13 17 20 52 64 Total ... 点击下载

文档预览： where you will find the complete overview of all our product data sheets ...EP1C12 2MB Flash for FPGA configurations Simple functional updates via software... 点击下载

文档预览： /home/matt/usrp-hw/usrp/power.sch 点击下载

文档预览： Altera Corporation 01/12/06 PCN0515 Products Affected: Package Pin Product Line EP1C12 EP1C20 EP1C4 EP20K100 EP20K100E EP20K30E ... 点击下载

文档预览： EP1C3 EP1C4 EP1C6 EP1C12 EP1C20 Notes to Table 1–2:(1) (2) TQFP:...This chip-wide reset overrides all other control signals.MultiTrack Interconnect... 点击下载

文档预览： Altera Corporation Section I-1 Preliminary Section I. Cyclone FPGA Family Data Sheet This section provides designers with the data sheet specifications for Cyclone ® devices. The chapters contain feature definitions of the internal architecture ... 点击下载

文档预览： EP1C3 EP1C4 EP1C6 EP1C12 EP1C20 Notes to Table 1–2:(1) (2) TQFP:...This chip-wide reset overrides all other control signals.MultiTrack Interconnect... 点击下载

文档预览： EP1C3 EP1C4 EP1C6 EP1C12 EP1C20 Notes to Table 1–2:(1) (2) TQFP:...This chip-wide reset overrides all other control signals.MultiTrack Interconnect... 点击下载